Dr. Shreejith Shanker

Dr. Shanker is an Assistant Professor at the Department of Electronic & Electrical Engineering at Trinity College Dublin, The University of Dublin, Ireland, since April 2019. He graduated with a Bachelors degree in Electronics & Communication Engineering from the former the University of Kerala {currently called APJ Abdul Kalam Technological University} in 2006 and a PhD degree from Nanyang Technological University and Technical University of Munich in 2016. From 2015 to 2016, he was a post-doctoral research fellow at the Hardware and Embedded Systems Lab, Nanyang Technological University, Singapore where he was working on cognitive radio architectures and techniques for commercial and aeronautical communication systems. He took up the role of Teaching Fellow at the School of Engineering, The University of Warwick, UK in 2017, where he continued his research on in-network computation and accelerators, while primarily focussing on delivering modules on Computer Architecture and Programming to the undergraduate cohort. He briefly took up the role of Research Fellow at the Electrification Suite and Test Lab , TUM CREATE Ltd, Singapore, exploring research ideas on decentralised compute systems in smart energy systems and power grids before taking up the role of Assistant Professor at Trinity College Dublin, Ireland. His current research explores reconfigurable architectures and frameworks for distributed accelerators that are tightly coupled to the network fabric, with application to autonomous systems, media processing and communication networks. He started his professional career in 2006 as a Design Engineer at Processor Systems India where he was involved in design and verification of high-speed custom logic for network switches and compute accelerators. Later, he joined the Vikram Sarabhai Space Centre, one of the premier research centres under the Indian Space Research Organisation as a Scientist working on design of real-time, mission critical subsystems for launch vehicles and satellite systems.

  Applied Electronics   ARTIFICIAL NEURAL NETWORKS   Automotive Electronics   Communication engineering, technology   Communication Systems   Communications engineering   Computer architecture   Computer Hardware   Computer Networks   Computer/Data/Network Security   Data protection, storage technology, cryptography   Digital Computers/Computing   Digital systems, representation   Distributed systems   Electrical Engineering/Electronics   Electronic circuit design   Electronic Engineering, circuit design   ELECTRONICS   Embedded computing   Field Programmable Gate Arrays (FPGAs)   High Performance Computing   Information/Communication Systems   Integrated Circuits   Intelligent Vehicles   Network technology, Security   Networking   Networks and telecommunications research   NEURAL NETWORKS   Reconfigurable Computing   Signal processing   Systems Engineering   Vehicle technology   Very Large Scale Integration (VLSI)   Wireless Networks

My research area focuses on building computer architectures that enable unique ways for improving compute efficiency, network performance and provide reactive capabilities to adapt to changing environments, through seamless interaction of software and hardware. My research applies this approach to tailor compute, network and deep-learning architectures to enable data-driven real-time reactive solutions in different domains such as automotive embedded systems, cognitive radio systems, and biomedical systems. A key enabler for his research is fully programmable platforms (or reconfigurable hardware), which enables both the software and the underlying hardware to be adapted to the compute requirements and specifications, either statically (i.e., at design time) or dynamically (i.e., at run-time). My current research direction focuses on enabling energy-efficient ways to perform compute-intensive data-driven tasks such as (edge-) cloud analytics or deep learning inference by optimising different components of the system - from low-level computational building blocks that enable efficient offload of compute-intensive tasks, to the software APIs that interface with the accelerators, and compiler tools to automate the development and deployment of these solutions. This combined strategy enables right-sizing of operations, interconnection, storage and data movement, which are critical components in reducing the energy footprint of such data-intensive tasks. In our current research, we are exploring three key application areas - secure connected automotive systems, bio-information systems for smart health, and high-performance video streaming/processing pipelines for visual algorithms in cloud/on-premise. Additionally, we also explore decentralisation of these compute tasks and consensus schemes to enable novel applications that preserve privacy in sensitive data-driven tasks to augment our approach.