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Dr. Philippos Papaphilippou

Assistant Professor (Computer Science)

 


Philippos Papaphilippou received his PhD from Imperial College London in 2021 and a master's from the University of Cambridge in 2017. His PhD was funded by dunnhumby (Tesco) for researching novel accelerators to improve the performance of big data analytics. He was a Microsoft contractor/intern and a senior CPU architect at Huawei Technologies R&D (UK) Limited. He has recently joined Trinity College Dublin, Ireland as an Assistant Professor for contributing to the Human Capital Initiative (HCI). His research topics include FPGAs, sorting algorithms, network switches, multi-processor architectures and data science.
Philippos Papaphilippou, Thiem Van Chu, Efficient deadlock avoidance for 2D mesh NoCs that use OQ or VOQ routers, IEEE Transactions on Computers, 2024, p13 , Journal Article, IN_PRESS  TARA - Full Text
Philippos Papaphilippou,Zhiqiang Que, Wayne Luk, Efficiently Removing Sparsity for High-Throughput Stream Processing, The International Conference on Field-Programmable Technology (FPT) 2023, Yokohama, Japan, 2023, 2023, Conference Paper, IN_PRESS  TARA - Full Text
Papaphilippou, Philippos, Sano, Kentaro, Adhi, Boma A., Luk, Wayne, Experimental survey of FPGA-based monolithic switches and a novel queue balancer, IEEE Transactions on Parallel and Distributed Systems, 2023, Journal Article, PUBLISHED  DOI
Philippos Papaphilippou and Wayne Luk and Chris Brooks, FLiMS: a Fast Lightweight 2-way Merger for Sorting, IEEE Transactions on Computers, 2022, Journal Article, PUBLISHED  DOI
Philippos Papaphilippou, Myrtle Shah, FPGA-extended General Purpose Computer Architecture, The 18th International Symposium on Applied Reconfigurable Computing (ARC), 2022, Journal Article, PUBLISHED  DOI
Philippos Papaphilippou and Jiuxi Meng and Nadeen Gebara and Wayne Luk, Hipernetch: High-Performance FPGA Network Switch, ACM Transactions on Reconfigurable Technology and Systems, 15, (1), 2021, p1--31 , Journal Article, PUBLISHED  DOI
Papaphilippou, Philippos, Reconfigurable acceleration of big data analytics, Imperial College London, 2021, Journal Article, PUBLISHED  DOI
Philippos Papaphilippou and Kentaro Sano and Boma A. Adhi and Wayne Luk, Efficient Queue-Balancing Switch for FPGAs, 2021 International Conference on Field-Programmable Technology (ICFPT), 2021, Journal Article, PUBLISHED  DOI
Philippos Papaphilippou and Paul H. J. Kelly and Wayne Luk, Demonstrating custom SIMD instruction development for a RISC-V softcore, 2021 31st International Conference on Field-Programmable Logic and Applications (FPL), 2021, Journal Article, PUBLISHED  DOI
Philippos Papaphilippou and Kelly Paul H. J. and Wayne Luk, Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions, 2021 31st International Conference on Field-Programmable Logic and Applications (FPL), 2021, Journal Article, PUBLISHED  DOI
  

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